**Job Id** E1958301
**Job Title** Design Verification Lead
**Post Date** 01/19/2018
**Company-Division** Qualcomm Technologies, Inc.
CDMA Technology at http://www.qualcomm.com/about/businesses/qct
**Job Area** Engineering – Hardware
**Location** California – San Diego
**Job Overview** QCT is currently seeking digital verification engineers for that support QCTs mobile platforms for next generation 5G RFIC technologies. Successful candidates will be working on the following: – Block level digital IP verification using constraint-random coverage methodologies at both RTL and Gate Level. The skills required are SV/UVM/UVM_REG/Randomization/Coverage/SVA.
All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.
**Minimum Qualifications** -Minimum Bachelors degree in Electrical Engineering or Computer Engineering
-5 years minimum ASIC DV experience and working knowledge of Object-Oriented SystemVerilog principles using UVM/OVM/VMM methodologies.
**Preferred Qualifications** – Extensive hand on experience in verifying digital blocks, building UVM based TB, writing UVM sequences, constraint-random testcases, using regModel (UVM_REG) API, drivers, monitors, scoreboard, functional coverage (covergroups), assertions (SVA), simulations, regression, debug, bug reporting/tracking.
-Experience in debugging RTL & Gate level simulations
-Part of multiple tapeouts with high quality verification.
**Education Requirements** Required: Bachelor’s, Computer Engineering and/or Electrical Engineering
Preferred: Master’s, Computer Engineering and/or Electrical Engineering
**EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.**
Who is Qualcomm, and what do we do? We are engineers, scientists and business strategists. We are from many different countries and speak many different languages. We come from diverse cultures and have unique perspectives. Together, we focus on a single goal—invent mobile technology breakthroughs.