Engineer – Digital SoC Synthesis, STA, Timing Constrants, FV and ECO (San Diego OR Bay Area)
Qualcomm Technologies, Inc. at http://www.qualcomm.com/about/businesses/qct
Engineering – Hardware
California – Bay Area
The QCT GSoC team is looking for bright engineers with excellent analytical and technical skills. This is a golden opportunity to be part of a fast-paced team responsible for delivering the design/flows for high performance & high quality SoC silicon on the latest process nodes at 7nm and beyond. **Top level SoC implementation, bridging the RTL and physical design worlds, including physical synthesis, formal verification, timing constraint creation/validation and functional ECO creation.**
All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.
+ Bachelor’s degree in Science, Engineering, or related field.
+ 5+ years ASIC design, verification, or related work experience.
+ 5+ years experience in logic synthesis, formal verification, timing constraint creation/validation and/or functional ECO creation.
+ Perl/tcl/python expertise
Required: Bachelor’s, Computer Engineering and/or Computer Science and/or Electrical Engineering
Preferred: Master’s, Computer Engineering and/or Computer Science and/or Electrical Engineering
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Who is Qualcomm, and what do we do? We are engineers, scientists and business strategists. We are from many different countries and speak many different languages. We come from diverse cultures and have unique perspectives. Together, we focus on a single goal—invent mobile technology breakthroughs.