Job Description:

**Job Id** E1958385

**Job Title** Staff Design Engineer

**Post Date** 09/01/2017

**Company-Division** Qualcomm Datacenter Technologies, Inc.

Qualcomm Datacenter Technologies, Inc.

**Job Area** Engineering – Hardware

**Location** California – San Diego

North Carolina – Raleigh

California – San Jose

**Job Overview** Be part of a small team that does pathfinding work on an IO architecture that integrates the high performance, power and area efficient, Die-to-Die interface technology targeting a multi-die SoC.

The goal is to design and deliver test chip and perform lab measurements and characterization work on main technology alternatives to assist in selection process.

Responsibilities in the test chip development include:

– RTL design of main logic components of I/O Interface

– mixed-signal circuit design for the I/O interface

– defining and implementing clocking architecture

– defining and implementing dynamic techniques for error recovery and power management

– Develop efficient power distribution and LDO design

– Support physical design, synthesis, pre-silicon verification and post-silicon testing

– Drive technology transfer from path-finding to product development.

All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.

**Minimum Qualifications** This is a senior design position requiring an MSEE and a minimum of 5 years of direct experience and proficiency in IO designs, familiarity with state-of-the-art techniques for very high-speed interfaces, low power design techniques, SI analysis and clocking architectures including PLL/DLL design.

Experience in designing various analog/mixed-signal design for IO circuits including CTLE, DFE, filters.

Experience in digital logic design including clocking and synchronization techniques.

Working knowledge of mixed-signal and CMOS design techniques. Experience of designing with 7nm CMOS process nodes is a plus.

Working knowledge of standard CAD tools (from Cadence, Synopsys etc.) for design, simulation and verification.

**Preferred Qualifications** PhD in Electrical Engineering with 5 year direct industry experience in delivering high performance I/O designs.

Knowledge of semiconductor processes and device physics related to CMOS silicon technologies.

Experience in chip top level integration, pin out and package selection.

Understanding of transistor simulation models, design rules and verification procedures (DRC/LVS/ERC).

Self-motivated with the ability to work in a research and path-finding environment where requirements and scope can be ambiguous or changing.

Understanding of process effects on designs and layout

**Education Requirements** Required: Bachelor’s, Computer Engineering and/or Computer Science and/or Electrical Engineering

Preferred: Doctorate, Computer Engineering and/or Computer Science and/or Electrical Engineering

**EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.**

About Qualcomm

Who is Qualcomm, and what do we do? We are engineers, scientists and business strategists. We are from many different countries and speak many different languages. We come from diverse cultures and have unique perspectives. Together, we focus on a single goal—invent mobile technology breakthroughs.